Monolithic, lattice-matched Laser-on-Si

NAsP_III/V with its cooperation partners at the Material Sciences Center of the Philipps-University Marburg (Germany) have developed a novel proprietary III/V-semiconductor laser material (i.e., Ga(NAsP)/GaP), which can be grown lattice-matched and, thus defect-free on (001) Si-substrate. The future monolithic integration with Si-micro- and nanoelectronics will lead to Si-based optoelectronic and photonic integrated circuits (OEICs and PICs) with unique novel functionalities in the up-coming field of Silicon Photonics.

It is well known that the further continuous development of the current computer technology is limited by physical properties of the silicon. To enter new dimensions within that industry the superior optical and electrical properties of the III/V-semiconductor system come into play. The optoelectronic performance of III/V-semiconductors will allow future chip-to-chip and on-chip optical data communication. This will lead to higher data rates accompanied by lower energy consumption.

The novel Ga(NAsP)-material system is the one and only direct band-gap III/V-semiconductor material, which can be grown lattice-matched on (001) Si-substrate. This unique property of Ga(NAsP), thus, avoids the formation of misfit and threading dislocations, which have hindered the realization of reliable III/V-laser sources based on heteroepitaxial approaches for decades. As proof-of-concept electrical injection lasers at room temperature based on Ga(NAsP) have been realized on GaP-substrate ( paper ). At present dedicated development projects are underway to improve the high-temperature performance of the first electrical-injection laser structures also on (001) Si-substrate [publications].

NAsP has in addition developed a unique front-end integration concept of this novel lattice-matched Ga(NAsP)-based laser material into the standard CMOS-process flow. The application of n- and p-doped Si buffer and cap layers allow for the usage of standard CMOS-metallization schemes significantly facilitating the integration into the standard CMOS-process flow. Furthermore the novel Ga(NAsP)-laser ridge is completely embedded by CMOS-compatible dielectrics at the side walls as well as the laser facets, thus, strongly reducing cross-contamination issues in subsequent CMOS-process steps.